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power management SC21150 tiny 1.2a synchronous buck regulator typical application circuit rev 2.0 features input voltage range 2.3v to 5.5v .2a continuous output current 4mhz switching frequency adjustable output voltage 0.8v to vin % output voltage accuracy adaptive on-time architecture up to 00% duty cycle up to 96% peak efciency power save mode for efcient light load operation >90% efciency 30ma to 75ma a shutdown current 23a quiescent current pre-bias startup protection internal or optional external soft start device options (contact semtech marketing) automatic output discharge power good indicator internal soft start external programmable soft start forced pwm operation input 0.75mm x . mm, 6-bump wlcsp package weee and rohs compliant and halogen-free applications automotive smart phones wearable electronics tablet pcs gps devices battery powered equipment portable devices ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? description the sc2 50 is an ultra high efciency .2a dc/dc buck regulator available in a tiny csp package. these features make the sc2 50 family perfect for small form factor portable applications where long battery life is essential. sc2 50 is an adaptive on-time 4mhz switching regula - tor at full load conditions. under light load conditions it seamlessly transitions into power save mode and reduces switching frequency thus saving energy. high switching frequency operation allows the use of a very small 0.47h inductor along with small input and output capacitors to minimize overall circuit size. a forced pwm input allows continuous switching under all load conditions. the sc2 50 is highly confgurable with a wide range of factory options including internal soft start time, fxed or adjustable output voltage, automatic output discharge, and a forced pwm input. the sc2 50 is ofered in an ultra small wlcsp 6-bump 0.75mm x . mm package with a bump pitch of 0.35mm. the sc2 50 operating temperature range is -40c to +85c. 2 . 3 v - 5 . 5 v supply sc 21150 0 . 47 h 1 . 2 a output en vin lx en gnd fb 10 f 4 . 7 f fpwm adjustable output voltage fpwm
SC21150 2 pin confguration marking information 0 . 7 5 x 1 . 1 1 ( m m ) 6 - b u m p w l c s p a 1 a 2 b 1 b 2 t o p v ie w c 1 c 2 bump assignments 0.75x1.11mm 6-bump wlcsp row/column 1 2 a gnd vin b lx fpwm c fb en 0 . 7 5 x 1 . 1 1 6 - b u m p w l c s p t o p v ie w x x 6-bump wlcsp marking diagram xx = pin a1 and marking code 6-bump wlcsp device code part number output marking code sc2 50acstrt adj az
SC21150 3 ordering information device ()(2) options (3) package output (3) soft-start (3) output discharge (3) sc2 50acstrt adjustable 00s automatic 0.75 x . mm 6-bump wlcsp sc2 50evb evaluation board 0.75 x . mm 6-bump wlcsp notes: ( ) available in tape and reel only. a reel contains 5,000 devices. (2) lead-free packaging only. device is weee and rohs compliant and halogen-free. (3) for other device combinations contact semtech marketing for additional options. the following options can be made available: vout options : fxed or adjustable versions. fixed voltages can be specifed, from 0.8v to 3.6v in 50mv increments. soft-start options: fixed internal 00s, with options for 200s/400s/800s. output discharge options: automatic discharge and no discharge. frequency: the default operating frequency is 4mhz with options of 2.2mhz, 3mhz, or 6mhz.
SC21150 4 absolute maximum ratings vin (v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0 en (v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0. 5 to +(vin+0.3) fb, fpwm (v) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +(vin+0.3) lx (v). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +(vin+0.3) esd protection level (kv) () . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 recommended operating conditions input voltage range (v) . . . . . . . . . . . . . . . . . . . . . . . . 2.3 to 5.5 output voltage range (v) . . . . . . . . . . . . . . . . . . . . . . . . 0.8 to 3.6 maximum continuous current (a). . . . . . . . . . . . . . . . . . . . . .2 junction temperature range (c) . . . . . . . . . -40 < t j < + 25 thermal information thermal resistance junction to ambient (2) (c/w ) wlcsp package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 00 maximum junction temperature (c) . . . . . . . . . . . . . . + 50 operating junction temperature (c ) . . . . . . . -40 to + 25 storage temperature range (c) . . . . . . . . . . . . -65 to + 50 peak ir refow temperature ( 0s to 30s) (c) . . . . . . . +260 exceeding the above specifcations may result in permanent damage to the device or device malfunction. operation outside of the parameters specifed in the electrical characteristics section is not recommended. notes: () tested according to jedec standard jesd22-a 4-b. (2) calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer fr4 pcb with thermal vias under the exposed pad per jesd5 standards. electrical characteristics unless otherwise noted vin = 5.0v, cin = 4.7f, cout = 0f, l = 0.47h, en = vin, t j = -40 to +85c. typical values are at t a = 25c. parameter symbol conditions min typ max units input supply input supply voltage range vin 2.3 5.5 v shutdown current isd en = 0v 0. a quiescent current iq operating, no load, power save option 23 a under voltage lock out threshold uvlorise vin rising edge 2.05 2.6 2.27 v under voltage lock out hysteresis uvlohyst 85 mv output voltage (1) feedback voltage vfb adjustable vout 0.80 v feedback voltage tolerance vfbtol adjustable vout -2 +/- +2 % feedback input leakage current ifb adjustable vout 25 na
SC21150 5 parameter symbol conditions min typ max units output voltage range vout adjustable vout 0.8 vin v output voltage line regulation dvline 5.5v > vin > (vout + ), pwm operation 0.7 %/v output voltage load regulation dvload 500ma < iload < .2a -0.3 %/a maximum output current iout continuous current .2 a soft start soft start time () tss fb: from lx rising edge to 95% of final value 00 s lx switching node on resistance high-side rdson_hs fb = 0v; ilx = 500ma 60 m? on resistance low-side rdson_ls fb = vin; ilx = 500ma 20 m? lx leakage current high side ilx_hs fb = vin = 5.5v; vlx = 0v -.5 -0. a lx leakage current low side ilx_ls fb = 0v; vlx = vin = 5.5v; vout automatic discharge disabled 0. a lx pulldown current () ilx_pd en = 0v; vlx = v; vout automatic discharge enabled 20 ma switching frequency () fsw 4mhz option, pwm operation, 500ma load, adjustable output, vout = 2.5v 3.6 4.0 4.4 mhz current sense high side current limit ilimhs current from vin to lx .5 2.2 3.0 a low side current limit ilimls current from lx to gnd -0.8 a zero cross detector threshold ithzcpfm power save mode and dc test condition 0 ma thermal protection over-temperature shutdown tts_rise rising temperature 60 c over-temperature hysteresis tts_hyst 0 c en input en input high threshhold vihen .2 v en input low threshhold vilen 0.4 v en input high current iihen ven = vin - a en input low current iilen ven = 0v a electrical characteristics (continued)
SC21150 6 electrical characteristics (continued) parameter symbol conditions min typ max units forced pwm input (1) fpwm input high threshhold vihfpwm .2 v fpwm input low threshhold vilfpwm 0.4 v fpwm input high current iihfpwm fpwm pin = vin - a fpwm input low current iilfpwm fpwm pin = 0v a notes: () the following options can be made available: vout options : fxed or adjustable versions. fixed voltage options are as shown in the ordering information table. additional fxed voltages can be specifed, from 0.8v to 3.6v in 50mv increments. soft-start options: fixed internal 00s, with options for 200s/400s/800s. output discharge options: automatic discharge and no discharge. frequency: the default operating frequency is 4mhz with options of 2.2mhz, 3mhz, or 6mhz.
SC21150 7 typical characteristics efciency vs. load - 5vin 50 55 60 65 70 75 80 85 90 95 100 0.01 0.10 1.00 efficiency (%) load (a) 1.0v psave 1.0v fpwm 1.5v psave 1.5v fpwm 2.2v psave 2.2v fpwm 3.3v psave 3.3v fpwm efciency vs. load - 4.2vin 50 55 60 65 70 75 80 85 90 95 100 0.01 0.10 1.00 efficiency (%) load (a) 1.0v psave 1.0v fpwm 1.5v psave 1.5v fpwm 2.2v psave 2.2v fpwm 3.3v psave 3.3v fpwm efciency vs. load - 3.3vin 50 55 60 65 70 75 80 85 90 95 100 0.01 0.10 1.00 efficiency (%) load (a) 1.0v psave 1.0v fpwm 1.5v psave 1.5v fpwm 2.2v psave 2.2v fpwm efciency vs. load - 2.3vin 50 55 60 65 70 75 80 85 90 95 100 0.01 0.10 1.00 efficiency (%) load (a) 1v psave 1v fpwm 1.5v psave 1.5v fpwm efciency vs. load - vout 1.0v 50 55 60 65 70 75 80 85 90 95 100 0.01 0.10 1.00 efficiency (%) load (a) 2.3vin psave 2.3vin fpwm 3.3vin psave 3.3vin fpwm 4.2vin psave 4.2vin pfwm 5.0vin psave 5.0vin fpwm vin = 5.0v, vout as shown, load = 0 to .2a vin = 4.2v, vout as shown, load = 0 to .2a vin = 3.3v, vout as shown, load = 0 to .2a vin = 2.3v, vout as shown, load = 0 to .2a efciency vs. load - vout 1.8v 50 55 60 65 70 75 80 85 90 95 100 0.01 0.10 1.00 efficiency (%) load (a) 3.3vin psave 3.3vin fpwm 5vin psave 5vin fpwm vin as shown, vout = .0v, load = 0 to .2a vin as shown, vout = .8v, load = 0 to .2a
SC21150 8 typical characteristics frequency vs load - 5vin, fpwm operation 3.6 3.7 3.8 3.9 4.0 4.1 4.2 4.3 4.4 0.0 0.2 0.4 0.6 0.8 1.0 1.2 frequency (mhz) load (a) 1.0v fpwm 1.5v fpwm 2.2 fpwm 3.3v fpwm frequency vs load - 3.3vin, fpwm operation 3.6 3.7 3.8 3.9 4.0 4.1 4.2 4.3 4.4 0.0 0.2 0.4 0.6 0.8 1.0 1.2 frequency (mhz) load (a) 1v fpwm 1.5v fpwm 1.8v fpwm frequency vs load - 2.3vin, fpwm operation 3.6 3.7 3.8 3.9 4.0 4.1 4.2 4.3 4.4 0.0 0.2 0.4 0.6 0.8 1.0 1.2 frequency (mhz) load (a) 1v fpwm 1.5v fpwm quiescent current vs output voltage 18 20 22 24 26 28 30 32 0.8 1.2 1.6 2.0 2.4 2.8 3.2 quiescent current (ua) vout (v) 2.3vin 3.3vin 4.2vin 5.0vin rds on vs. input voltage 80 120 160 200 240 280 320 360 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 rds on (m ? ) vin (v) high-side low-side vin = 5.0v, vout as shown, load = 0a to .2a, fpwm = gnd vin = 3.3v, vout as shown, load = 0a to .2a, fpwm = gnd vin = 2.3v, vout as shown, load = 0a to .2a, fpwm = gnd vin as shown, vout as shown, no load, rbot = 00k, fpwm = vin rds on vs. temperature 70 90 110 130 150 170 190 210 230 250 270 -40 -25 -10 5 20 35 50 65 80 95 110 125 rds on (m ? ) junction temperature (c) high-side low-side vin as shown, ilx = 500ma vin = 5.0v, ilx = 500ma
SC21150 9 typical characteristics (continued) power save operation no load time (10ms/div) vin = 5v, vout = 3.3v, 0ma load, fpwm = gnd vout (50mv/div) lx (5v/div) power save operation 50ma load time (2s/div) vin = 5v, vout = 3.3v, 50ma load, fpwm = gnd vout (50mv/div) lx (5v/div) fpwm operation no load time (200ns/div) vin = 5v, vout = 3.3v, 0ma load, fpwm = vin vout (50mv/div) lx (5v/div) fpwm operation 1.2a load time (100s/div) vout (50mv/div) lx (5v/div) vin = 5v, vout = 3.3v, .2a load startup vin ramp time (200ns/div) vout (500mv/div) lx (5v/div) vin = en = 2.3v ramp, vout = .2v, no load startup - en control time (100s/div) vout (500mv/div) lx (5v/div) vin = 5v, vout = .2v, .2a load en (2v/div) vin (2v/div)
SC21150 0 typical characteristics (continued) load transient - power save pfm to pwm time (100s/div) vin = 3.3v, vout = .0v, load 0a to .2a to 0a, fpwm = gnd vout (50mv/div) lx (5v/div) load transient - pwm to pwm time (100s/div) vin = 3.3v, vout = .0v, load 0a to .2a to 0a, fpwm = gnd vout (50mv/div) lx (5v/div) load transient - power save pfm to pwm time (100s/div) vin = 5v, vout = 3.3v, load 0a to .2a to 0a, fpwm = vin vout (00mv/div) lx (5v/div) load transient - pwm to pwm time (100s/div) load ( a/div) lx (5v/div) vin = 5v, vout = 3.3v, load 0a to .2a to 0a, fpwm = vin pwm minimum of operation time (2s/div) vout (50mv/div) lx (5v/div) vin = 3.7v, vout = 3.3v, 800ma load overcurrent shutdown and recovery time (400s/div) vout (v/div) lx (5v/div) vin = 5v, vout = .0v, load 0a to 2.0a to 0a, fpwm = gnd load ( a/div) vout (00mv/div) load (2a/div) load ( a/div) load ( a/div)
SC21150 detailed application circuit 2 . 3 v - 5 . 5 v supply sc 21150 0 . 47 h 1 . 2 a output en vin lx en gnd fb 10 f 4 . 7 f fpwm adjustable output voltage fpwm
SC21150 2 bump descriptions - 0.75 x 1.11mm 6-bump wlcsp bump bump name bump description a gnd ground connection. a2 vin input supply voltage for the device and sense point for the input under voltage lock out. b lx switching node connection to inductor. b2 fpwm forced pwm input a logic low enables the automatic power save feature. a logic high disables the power save feature to ensure forced pwm operation. c fb feedback input (output voltage sense). to adjust the output voltage, connect to the midpoint of a resistor divider between the output voltage and gnd. c2 en enable input. connect to logic high or vin to enable the device. connect to logic low or gnd to disable the device.
SC21150 3 block diagram p w m / p o w e r s a ve c o n tro lle r g n d v in e rro r a m p l x e n p m o s n m o s r a m p g e n ic o m p p w m c o m p g a te d rive ic o m p r e f f ixe d / a d ju sta b le v o u t s e le ct d e vice e n a b le a n d u v l o f p w m a 2 b 1 a 1 c 1 c 2 b 2 f b
SC21150 4 synchronous buck converter the sc2 50 is a synchronous buck regulator that employs an adaptive on-time architecture to provide fast transient response and very small circuit area. the sc2 50 oper - ates over an input voltage range of 2.3 to 5.5v. operating modes the sc2 50 operates in one of four diferent modes depending on the status of vin, vout, and load. pwm adaptive on-time operation (aot) pwm minimum of-time operation (min of ) pfm (pulse frequency modulation for power saving) drop-out operation (ldo mode) pwm aot mode operation during pwm aot operation the controller uses adaptive on-time control. the fb ripple signal is routed to a gain stage and then to the internal comparator and reference which trigger the high-side pulses. the reference includes a compensation ramp which emulates the inductor current to provide stable switching. aot operation is used when the low-side pulse-width (of- time) is greater than the minimum 60nsec. a switching cycle in aot mode is as follows: on-time: the cycle starts with the high-side mosfet turn-on. the pulse width is set by the following formula where f sw is 4mhz: 6: ,10$; 28 7 21 i 9 9 7 u off-time: after the high-side on-time is com - pleted, the low-side mosfet turns on to begin the of-time. the of-time pulse width is set by the internal compensation ramp and under static conditions results in typically 4mhz switch - ing frequency. note that the sc2 50 enters aot operation if vin is less than vout/0.88. also note that connecting the fpwm to a logic high will disable the power save feature and lead to constant switching even under light load conditions. ? ? pwm min of operation the device will enter minimum of-time operation (min of ) when vin, vout, and load conditions force the of- time (time between high-side pulses) to the minimum value, typically 60nsec. this indicates that the controller has reached maximum duty cycle for aot operation and longer duty cycles are needed. in min of operation the sc2 50 uses constant of-time control. as in aot operation, the fb ripple signal is routed to a gain stage and then to the internal aot comparator and reference. in min of mode, the fb ripple triggers the low-side turn-on. min of switching cycle operation is as follows: of-time: the low-side mosfet is on for a fxed minimum of time of 60nsec. this draws current from the output capacitor through the inductor via the lx pin and causes the output to fall. on-time: after the min of time of 60nsec has elapsed, the high-side mosfet turns on. this helps recharge the output capacitor and bring the output voltage up. the on-time pulse width is determined by the internal compensation ramp. drop-out operation when operating in min of mode, the of-time is constant and the high-side on-time varies in order to regulate the output. for cases where vin is near vout, the high-side will remain on continually with 00% duty cycle. the output voltage will then be limited by the input voltage, high-side rds on and inductor dcr as shown in the fol - lowing equation: '&5 5'621 ,/2$ ' 9, 1 9287 u note that rds on is a function of input voltage and tem - perature. inductor dc resistance also increases with temperature. ? ? applications information
SC21150 5 applications information (continued) power save (pfm) operation pfm operation is enabled when the fpwm input is a logic low. under this condition, the ic automatically reduces switching frequency under light load conditions to con - serve power. in pfm operation, the fb ripple signal is routed to a gain stage and compared to an internal refer - ence. a switching cycle is as follows. on-time: the high-side mosfet turns on, as trig - gered by the fb signal falling to the internal ref - erence. the high-side stays on for a predetermined time based on vin and vout, then turns of. of-time: the low-side mosfet turns on. inductor current is monitored via the low-side switch. when the current falls to zero, the low-side mosfet turns of. dead-time: both mosfets are of. if the fb signal is higher than the internal reference, both mosfets remain of. during the dead-time the load current is supplied by the output capacitor, causing the output and the fb signal to fall. when the fb signal falls to the 800mv threshold, the next high-side pulse begins. as load current increases, the dead-time between pulses reduces. on any cycle, if the minimum of-time (60nsec) has elapsed and the fb signal is calling for another high- side on-time, the controller exits pfm and enters pwm operation. once the controller is in pwm operation, the inductor current must go below zero (go negative) for 6 switch - ing cycles before the controller will return to pfm operation. soft start the sc2 50 contains an internal soft start to reduce inrush current during start-up. during start-up, the fb signal is compared to an internal ramp, providing a gradual ramp on vout. the timing to move vout from 0v to 95% of fnal value is typically 00usec. optional soft start times of 200usec, 400usec, and 800usec can be provided. ? ? ? pre-bias start-up during start-up, the low-side mosfet turns of if the induc - tor current falls negative (into the lx pin) on any cycle. this prevents discharge of the output capacitor during the soft-start cycle. note that if the output is loaded during a pre-bias start-up, the output voltage may fall until the internal soft-start ramp rises above the voltage seen at the fb pin. vin under-voltage lockout the sc2 50 includes an under-voltage lockout (uvlo) to inhibit switching until the input voltage exceeds 2. 6v. the vin uvlo threshold has 85mv hysteresis to prevent chatter during start-up. en input the en input is a logic level input. when en is set to logic high, the sc2 50 goes through an internal reset to prepare for operation. the soft-start ramp and mosfet switching begin typically 50sec after en is driven high. when en is low (grounded), the power mosfets are of and the sc2 50 is its lowest power state. the automatic discharge mosfet connected to lx is on to discharge the output before the next start-up cycle. fpwm input the fpwm input is a logic level input that enables or dis - ables the power save feature. connect the fpwm input to a logic low or gnd to enable power save operation. to disable power save operation and provide continuous switching at all loads, connect the fpwm input to a logic high or vin. automatic discharge when the en pin is pulled low (grounded), the power mosfets are tri-stated and the lx pin is connected to gnd through an internal mosfet to discharge the output capacitors. typical mosfet rds on is 40 ohms at 5v and 25c. note that rds on is a function of both vin and temperature. the automatic discharge feature can optionally be dis - abled from the device.
SC21150 6 over-current protection the sc2 50 provides overload protection through pulse by pulse current limiting. during the high-side on-time, the high-side switches of if the inductor current exceeds 2.2a typically. the low-side turns on briefy, followed by the next high-side on-time. switching continues while the output overload exists. when the overload is removed, the sc2 50 will resume normal operation. if the over - load causes high junction temperature, the sc2 50 will go into over-temperature protection. over-temperature protection the sc2 50 will shut down if the junction temperature exceeds typically 60 c. the device will automatically restart after the junction temperature has dropped typi - cally 0 c. component selection the sc2 50 is optimized for use with components as shown in the detailed applications circuit, page . inductor: the inductor should be 0.47uh and capable of supporting a minimum current of .2a. input capacitor: ceramic capacitor, minimum 4.7uf, x5r or x7r or better dielectric. output capacitor: ceramic capacitor, minimum 0uf, x5r or x7r or better dielectric. note when operating in min off mode, higher output capacitance may needed to reduce output ripple when vin approaches vout. the fb components provide output voltage sensing and feedback compensation to regulate the output. the output voltage is programmed using two resistor along with a compensation capacitor. r to p t o f b p in r b o t v o u t c to p t o f b p in applications information (continued) the fb regulation setpoint is 800mv. the output voltage can be calculated as shown. ? 1 ? u 5erw 5wrs 9 28 7 the fb resistor values can be calculated as shown. it is recommended to use 00k for rbot to minimize power loss in the fb network. 9 5erw 9 9287 5wrs u the optimum value for ctop is 22pf.
SC21150 7 pcb layout guidelines an optimum layout for the sc2 50 is shown below. when doing the pcb layout the following guidelines should be used: the input capacitor must be located as close as possible to the ic and directly connected to pins a2 (vin) and a (gnd). the lx trace from pin b to the inductor should be as short as possible, and wide to reduce ir loss and improve heat dissipation. the output capacitor should be close to the inductor. the feedback components (rtop, ctop, rbot, for adjustable vout) should be located as close as possible to the fb pin. for the ground connection to rbot, use a via to a ground plane and place another via near the a (gnd) pin of the ic. the fb trace should be short and not routed near noise signals. do not route the fb trace under the inductor; the high impedance of the fb circuit can pick up noise from the inductors magnetic feld. cin l 1 cout vout vin sc 21150 r b o t r t o p c t o p gnd lx fb f p w m e n SC21150 pcb layout
SC21150 8 outline drawing 0.75 x 1.11mm 6-bump wlcsp
SC21150 9 land pattern 0.75x1.11 6-bump wlcsp
semtech corporation power management products division 200 flynn road, camarillo, ca 930 2 phone: (805) 498-2 fax: (805) 498-3804 www.semtech.com contact information SC21150 20 ?semtech 20 6 all rights reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any conse - quence of its use. publication thereof does not convey nor imply any license under patent or other industrial or intellec - tual property rights. semtech assumes no responsibility or liability whatsoever for any failure or unexpected operation resulting from misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specifed maximum ratings or operation outside the specifed range. semtech products are not designed, intended, authorized or warranted to be suitable for use in life- support applications, devices or systems or other critical applications. inclusion of semtech products in such applications is understood to be undertaken solely at the customers own risk. should a customer purchase or use semtech products for any such unauthorized application, the customer shall indemnify and hold semtech and its ofcers, employees, subsidiaries, afliates, and distributors harmless against all claims, costs damages and attorney fees which could arise. notice: all referenced brands, product names, service names and trademarks are the property of their respective owners.

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